1. Field of the Invention
The present invention generally relates to semiconductor devices and more particularly to a multi-chip module including a plurality of semiconductor chips.
2. Description of the Related Art
In relation to recent trend of reducing the size of various electronic apparatuses and devices while simultaneously maintaining, or even increasing, device performance, there is a stringent demand for cutting the time needed for developing new devices and a timely supply of newly developed devices to the market.
Conventionally, semiconductor devices designed for high density mounting have used the so-called QFP (quad flat package) structure that enables an increase in the number of lead pins and decrease of lead pitch.
FIG. 1 shows an example a conventional QFP device 11 mounted upon a printed circuit board 14.
Referring to FIG. 1, the QFP device 11 includes a resin package body 12 in which a semiconductor chip (not illustrated) is accommodated, wherein the QFP device 11 carries a number of lead pins 13 projecting laterally from the circumferential walls or side edges of the package body 12. The lead pins 13 are bent in the downward direction outside the package body to form a well-known gull wing structure.
The printed circuit board 14, on the other hand, is formed of a material such as glass epoxy, and carries thereon a conductor pattern 15 in correspondence to the lead wires 13 of the QFP device 11 or other components, wherein the device 11 is mounted upon the substrate 14 by soldering the lead wires 13 upon the corresponding conductor patterns 15. Such a mounting process used commonly in the art partly because of the fact that the soldering is conducts easily due to the low reflow temperature of the solder alloy and partly because of the fact that glass epoxy substrate is easily available with a low cost.
As already noted, the semiconductor device 11 includes a semiconductor chip encapsulated in the package body 12 formed of a resin, wherein the chip is held, inside the package body 12, on a lead frame stage as usual. The semiconductor chip carries bonding pads thereon, and the bonding pads are interconnected to corresponding inner leads of the lead wires 13 by bonding wires.
Meanwhile, in order to further increase the mounting density of the semiconductor devices, a so-called multi-chip module structure is proposed, wherein a plurality of semiconductor chips are encapsulated in a single package body.
FIGS. 2A-2D show the construction of a conventional multi-chip module in an elevational cross section.
Referring to FIG. 2A showing a conventional multi-chip module 21A, the multi-chip module 21A includes a chip mother board 22a carrying thereon a plurality of semiconductor chips 23, wherein the semiconductor chips 23 are connected electrically to the chip mother board 22a by means of bonding wires 24. It should be noted that the chip mother board 22a itself is held on a lead frame stage 25 and is connected electrically to inner leads 26a by the bonding wires 24. The semiconductor chips 23 are encapsulated in a resin package body 27 together with the lead frame stage 25 and the chip mother board 22a as well as with the inner leads 26a, wherein outer leads 28a extend laterally from the package body 27 as an extension of the inner leads 26a. The outer leads 28a are thereby bent in the downward direction to form a J-shaped lead structure.
FIG. 2B shows another multi-chip module 21B that includes the semiconductor chips 23 in plural numbers on a chip mother board 22b, wherein the semiconductor chips 23 are connected electrically to the chip mother board 23b by means of the lead wires 24, similarly to the device 21A of FIG. 2A. In the case of the device of FIG. 2B, on the other hand, the chip mother board 22b carries thereon inner leads 26b directly such that the inner leads 26b are held upon a lower major surface of the chip mother board 22b together with the semiconductor chips 23. The semiconductor chips 23 are thereby encapsulated in the resin package body 27 together with the chip mother board 22b and the inner leads 26b, and outer leads 28b extend laterally from the resin package body 27 as an extension of the inner leads 26b. The outer leads 28b are thereby bent in the downward direction outside the package body 27 to form a gull wing lead structure.
FIG. 2C shows a still other multi-chip module 21C, wherein the device 21C has a structure similar to that of the device 21B of FIG. 2B, except that the upper major surface of the chip mother board 22b is exposed for contact with a heat sink 29.
FIG. 2D shows a still other multi-chip module 21D, wherein the device 21D has a structure similar to that of FIG. 2B except that each of the semiconductor chips 23 carries thereon bumps 23a for mounting upon a corresponding tape lead by way of the flip-chip process. Thus, the semiconductor chips 23 are mounted upon a corresponding tape lead 30 provided on the chip mother board 22b by the flip-chip process. In the illustrated example, the semiconductor chips 23 are mounted upon both upper and lower major surfaces of the chip mother board 22b.
In the conventional single-chip device of FIG. 1 in which the printed circuit board 14 carries thereon a plurality of components including the semiconductor device 11, there has been a problem in that the size of the printed circuit board 14 tends to increase, and accordingly the length of the conductor patterns formed thereon. Thereby, the high speed operation of the electronic apparatus is substantially deteriorated. Such a single chip module further has a drawback in that one has to replace the whole printed circuit board when a failure has developed in any of the components on the board. Thereby, the cost of the electronic apparatus inevitably increases.
In the case of the multi-chip modules 21A-21D of FIGS. 2A-2D, on the other hand, it should be noted that the interconnection between the semiconductor chips 23 and the chip mother board 22a or 22b is achieved by way of the bonding wire 24 or tape lead 30. Thus, such a conventional construction has a drawback of increased length of wiring and corresponding deterioration of the operational speed. Further, construction of FIGS. 2A-2D has another drawback in that it requires extensive modification of the interconnection or replacement of components when a design change has occurred in the multi-chip module. In such conventional multi-chip modules, therefore, such a design change inevitably invites substantial increase in the number of the fabrication steps and hence a corresponding increase in the fabrication cost of the device.